page-program-suspend

module TopModule (
  input  wire        clk,
  input  wire        rst,
  input  wire        start_i,
  input  wire [3:0]  count_i,
  input  wire [7:0]  waddr_i,
  input  wire [31:0] wseed_i,
  input  wire        susp_req_i,
  input  wire        resume_i,
  output reg         busy_o,
  output reg         done_o,
  output reg         susp_active_o,
  output reg         susp_ack_o,
  output reg [4:0]   committed_o,
  output reg [7:0]   cur_addr_o,
  output reg [31:0]  cur_data_o
);

  // FSM states
  localparam [1:0] IDLE   = 2'd0,
                   ACTIVE = 2'd1,
                   SUSP   = 2'd2,
                   REARM  = 2'd3;

  reg [1:0]  state;
  reg [1:0]  cyc;       // cycle index within current 3-cycle window (0..2)
  reg [4:0]  k;         // current word index (or parked word index)
  reg [3:0]  count_q;   // latched count
  reg [7:0]  waddr_q;   // latched base address
  reg [31:0] wseed_q;   // latched seed
  reg        pending;   // pending suspend request

  reg        eff_pend;  // combinational temporaries
  reg [4:0]  nk;

  always @(posedge clk) begin
    if (rst) begin
      state         <= IDLE;
      cyc           <= 2'd0;
      k             <= 5'd0;
      count_q       <= 4'd0;
      waddr_q       <= 8'd0;
      wseed_q       <= 32'd0;
      pending       <= 1'b0;
      busy_o        <= 1'b0;
      done_o        <= 1'b0;
      susp_active_o <= 1'b0;
      susp_ack_o    <= 1'b0;
      committed_o   <= 5'd0;
      cur_addr_o    <= 8'd0;
      cur_data_o    <= 32'd0;
    end else begin
      // pulses default low
      done_o     <= 1'b0;
      susp_ack_o <= 1'b0;

      case (state)
        // ---------------------------------------------------------------
        IDLE: begin
          // suspend/resume ignored while idle
          if (start_i) begin
            count_q       <= count_i;
            waddr_q       <= waddr_i;
            wseed_q       <= wseed_i;
            busy_o        <= 1'b1;
            committed_o   <= 5'd0;
            cur_addr_o    <= waddr_i;
            cur_data_o    <= wseed_i ^ 32'd1;   // word 0: wseed ^ (0+1)
            k             <= 5'd0;
            cyc           <= 2'd0;
            pending       <= 1'b0;
            susp_active_o <= 1'b0;
            state         <= ACTIVE;
          end
        end
        // ---------------------------------------------------------------
        ACTIVE: begin
          if (cyc != 2'd2) begin
            // inside the window: hold address/data, accumulate suspend req
            cyc     <= cyc + 2'd1;
            pending <= pending | susp_req_i;
          end else begin
            // closing edge (cyc == 2)
            committed_o = committed_o; // (no-op placeholder)
            committed_o <= committed_o + 5'd1;
            eff_pend = pending | susp_req_i;   // includes the closing edge
            nk       = k + 5'd1;

            if (k == count_q) begin
              // final close
              done_o     <= 1'b1;
              busy_o     <= 1'b0;
              cur_addr_o <= 8'd0;
              cur_data_o <= 32'd0;
              pending    <= 1'b0;              // discard pending on final
              state      <= IDLE;
            end else if (eff_pend) begin
              // non-final close with pending suspend -> suspend
              susp_active_o <= 1'b1;
              susp_ack_o    <= 1'b1;
              busy_o        <= 1'b1;
              cur_addr_o    <= 8'd0;
              cur_data_o    <= 32'd0;
              k             <= nk;             // park before next word
              pending       <= 1'b0;
              cyc           <= 2'd0;
              state         <= SUSP;
            end else begin
              // non-final close -> open next word on same edge
              k          <= nk;
              cur_addr_o <= waddr_q + {3'd0, nk};
              cur_data_o <= wseed_q ^ {27'd0, (nk + 5'd1)};
              cyc        <= 2'd0;
              pending    <= 1'b0;
              state      <= ACTIVE;
            end
          end
        end
        // ---------------------------------------------------------------
        SUSP: begin
          // ignore start_i and susp_req_i while suspended
          if (resume_i) begin
            susp_active_o <= 1'b0;
            pending       <= 1'b0;
            busy_o        <= 1'b1;
            cur_addr_o    <= 8'd0;
            cur_data_o    <= 32'd0;
            state         <= REARM;           // re-arm edge, addr/data zero
          end
        end
        // ---------------------------------------------------------------
        REARM: begin
          // following edge: open the parked word with a full window
          cur_addr_o <= waddr_q + {3'd0, k};
          cur_data_o <= wseed_q ^ {27'd0, (k + 5'd1)};
          cyc        <= 2'd0;
          pending    <= 1'b0;
          busy_o     <= 1'b1;
          state      <= ACTIVE;
        end
        // ---------------------------------------------------------------
        default: state <= IDLE;
      endcase
    end
  end

endmodule